Raspberry Pico: Designing a Custom C-SDK Library (Part 1)

Shift Register Essentials

The HC595 Shift Register

Pin Layout

  • Pin 8: GN
  • Pin 13: Output Enable, Active High
  • Pin 16: VCC 2V ~ 6V
  • Pin 14: Serial (SER)
  • Pin 11: Serial Clock (SRCLK)
  • Pin 10: Serial Clear (SRCLR) / Active High
  • Pin 12: Register Clock (RCLK)
  • Pin 15: QA
  • Pin 1: QB
  • Pin 2: QB
  • Pin 3: QC
  • Pin 4: QD
  • Pin 5: QF
  • Pin 6: QG
  • Pin 7: QH
  • Pin 9: QH* Serial Data Output, used for daisy chaining multiple shift registers

Operational Mode

  • Serial Data In: When SRCLK goes high, and SER is High, write binary 1. If SRCLK goes high, and SER is low, write binary 0 int the first register
  • Parallel Data Out: Write the current contents of the shift registers to the storage register when SRCLK goes low and RCLK goes high for 1 clock cycle
  • Reset Shift Register Data: SRCLR is set to low for 2 clock cycles
  • Reset Storage Register Data:
  • tclock frequency: max 5Hz
  • tw pulse duration: min 100Hz

Library Design

typedef struct ShiftRegister
uint8_t SERIAL_PIN;
bool serial_pin_state;
uint8_t register_state;
} ShiftRegister;
  • Write a single bit: Add a single bit to the first register, shifting the values of the other registers
  • Write a bitmask: Set all shift register values according to a bitmask, an 8-bit integer values that can be represented in C as 0b1100110
  • Flush: Transfer the current state of the shift register to the storage register, and output these values on the shift register output pins
  • Reset Shift Register: Clear all values in the shift register
  • Reset Storage Register: Clear all values in the storage register
bool shift_register_write_bit(ShiftRegister *, bool);
bool shift_register_write_bitmask(ShiftRegister *, uint8_t);
bool shift_register_flush(ShiftRegister *);
bool shift_register_reset(ShiftRegister *);
bool shift_register_reset_storage(ShiftRegister *);




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